International Journal of Reconfigurable and Embedded Systems (IJRES)
The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.
Articles
14 Documents
Search results for
, issue
"Vol 10, No 3: November 2021"
:
14 Documents
clear
<![CDATA[Heuristic algorithms for dynamic scheduling of moldable tasks in multicore embedded systems ]]>
<![CDATA[Takuma Hikida]]>;
<![CDATA[Hiroki Nishikawa]]>;
<![CDATA[Hiroyuki Tomiyama]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp157-167
<![CDATA[Dynamic scheduling of parallel tasks is one of the efficient techniques to achieve high performance in multicore systems. Most existing algorithms for dynamic task scheduling assume that a task runs on one of the multiple cores or a fixed number of cores. Existing researches on dynamic task scheduling methods have evaluated their methods in different experimental environments and models. In this paper, the dynamic task scheduling methods are systematically rearranged and evaluated.]]>
<![CDATA[A Survey of Brain Tumor Segmentation using Deep Neural Network ]]>
<![CDATA[p, karuppasamy]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp%p
<![CDATA[Tumor segmentation is an essential activity to providing intent way of predicting aggressiveness in medical image processing. Early identification of brain tumors plays a Significant part in making better treatment potential and increases the patient's lifetime. It is all important to segment the tumor, to protect healthy tissues during therapy. Manual segmentation is a complicated and prolonged procedure and improvement of automatic segmentation method afford proficient and intention segmentation. At present, automatic segmentation by means of deep learning methods proved the high-tech results. Deep learning methods for different kind of images provide robustness in segmentation. It refers to neural networks with many layers that extract a hierarchy of features from raw input images. This paper proposes to make another study of brain tumor segmentation along with the modern algorithms with current trends of deep learning algorithms are discussed.]]>
<![CDATA[Amalgam Illogical Controller Design Using Amended Moth System for Heat Reduction in Insulated Gate Bipolar Transistor ]]>
<![CDATA[Loganathan, P.]]>;
<![CDATA[Selvam, P.]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp%p
<![CDATA[The electric vehicle is seen as a possible replacement for current-generation automobiles and to address the rising pollution. In electrical drives, Insulated Gate Bipolar Transistor (IGBT) modules deliver power to the motor generate a lot of heat during switching. However, heat generation in IGBT hinders the performance of the electric vehicle. The foremost existing techniques analyze the heat however does not control the heat production in the IGBT module, and also high heat density leads to failing components. Thus to reduce the heat generated in the IGBT module, the work proposed an amalgam illogical controller that handles nonlinearity and provides a quick response. This controller is further tuned by Amended Moth System (AMS) to reduce heat consumption in the IGBT module with electrical parameters. Furthermore, the IGBT is complex to excessive voltage and excessive temperature therefore the current and voltage harmonics in the inverter are reduced by a seamless genuine adaptive filter that detects and suppresses the specified harmonics in the estimated back-EMF, consequently reducing the harmonic position error in the estimated rotor position. Even though there is a problem with a wide range of frequency in the electric motor. To reduce the switching frequency supremacy harm checker is incorporated which is forced to choose active and zero voltage vectors alternatively, to decrease the variation in the switching frequency. Thus the proposed outcomes efficiently tackle the issues in EV and greatly reduce heat consumption in the IGBT module.The electric vehicle is seen as a possible replacement for current-generationautomobiles and to address the rising pollution. In electrical drives, InsulatedGate Bipolar Transistor (IGBT) modules deliver power to the motor generatea lot of heat during switching. However, heat generation in IGBT hinders theperformance of the electric vehicle. The foremost existing techniquesanalyze the heat however does not control the heat production in the IGBTmodule, and also high heat density leads to failing components. Thus toreduce the heat generated in the IGBT module, the work proposed anamalgam illogical controller that handles nonlinearity and provides a quickresponse. This controller is further tuned by Amended Moth System (AMS)to reduce heat consumption in the IGBT module with electrical parameters.Furthermore, the IGBT is complex to excessive voltage and excessivetemperature therefore the current and voltage harmonics in the inverter arereduced by a seamless genuine adaptive filter that detects and suppresses thespecified harmonics in the estimated back-EMF, consequently reducing theharmonic position error in the estimated rotor position. Even though there isa problem with a wide range of frequency in the electric motor. To reducethe switching frequency supremacy harm checker is incorporated which isforced to choose active and zero voltage vectors alternatively, to decrease thevariation in the switching frequency. Thus the proposed outcomes efficientlytackle the issues in EV and greatly reduce heat consumption in the IGBTmodule.]]>
<![CDATA[Digital brain: Model-based framework for dependable electroencephalogram sensing and actuation in internet of things system ]]>
<![CDATA[R. J. Kavitha]]>;
<![CDATA[Saravanan K. K.]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp168-175
<![CDATA[Real-time brain internet of thing (IoT) frameworks are expensive. But, creating a cheaper framework has been quickened incredibly by the superior investigation that's being done on virtual brain. The passing of an imperative individual on a mystery mission is considered delicate data and must be taken care of with as much security as conceivable. By guaranteeing this discreteness, the time taken for the message of their passing to reach the pertinent specialist is expanded to up to a few days. The time taken to provide the message is as well. These days, the advancements in equipment expanding the capacities of the virtual brain and of the wearable brain IoT sensors have made the advancement of various unused program systems conceivable for engineers to make valuable applications that combine the human brain with IoT. Different tactile pathways are too empowered for communications of the human brain with bigger measured data. The fundamental point of this extend is to transfer secret records onto the clouds safely.]]>
<![CDATA[Obstacle Avoiding Robot Car ]]>
<![CDATA[Thakkar, Jayati Anilkumar]]>;
<![CDATA[Shah, Trusha]]>;
<![CDATA[Shaikh, Nishat]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp%p
<![CDATA[This paper proposes a design and implementation of a remote-controlled car run by Bluetooth Technology via an Android device. In this work, hardware and software technologies are used such as Arduino, Motor driver and Bluetooth module. Arduino is an Opensource prototyping platform supported easy-to-use hardware and software. Arduino uses an ATmega328 microcontroller. The objective of this project is to form an omnipresent technology for automobiles that operate in lifestyle with an effective system. In this project, the brain of the robot, Arduino microcontroller is programmed in such a way that it can detect any obstacle in a defined range and can choose a path with no obstacle in between. Since robotics has become a significant part in our standard of living and also within the engineering field and it plays an important role within the development of latest technology, This project can be made in a very bigger scale for real-time vehicles.This paper proposes a design and implementation of a remote-controlled car run by Bluetooth Technology via an Android device. In this work, hardware and software technologies are used such as Arduino, Motor driver and Bluetooth module. Arduino is an Opensource prototyping platform supported easy-to-use hardware and software. Arduino uses an ATmega328 microcontroller. The objective of this project is to form an omnipresent technology for automobiles that operate in lifestyle with an effective system. In this project, the brain of the robot, Arduino microcontroller is programmed in such a way that it can detect any obstacle in a defined range and can choose a path with no obstacle in between. Since robotics has become a significant part in our standard of living and also within the engineering field and it plays an important role within the development of latest technology, This project can be made in a very bigger scale for real-time vehicles.]]>
<![CDATA[Neural net implementation of steam properties on FPGA ]]>
<![CDATA[R. V. S. Krishna Dutt]]>;
<![CDATA[R. Ganesh]]>;
<![CDATA[P. Premchand]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp186-194
<![CDATA[Real time applications like model predictive control, monitoring and data reconciliation of power plants and industrial processes employ nonlinear mathematical models and require thermodynamic properties and their derivatives of working fluids. Applications like super heater temperature control based on energy balance and real time data reconciliation, require an efficient and a compact method for simultaneous estimation of thermodynamic properties, and their partial derivatives suitable for implementation in field-programmable gate array (FPGA). However, the complex mathematical formulations of these properties prohibit direct implementations in FPGAs. Single artificial neural network (ANN) architecture is used to replace the entire code in higher level languages, running into a few thousand lines. FPGA implementation of a compact neural network for the entire range of thermodynamic properties is presented. Large arguments in sigmoid function are factored into a product of integer and a fractional part which is represented using series approximation with five terms only and the integers are represented in look up table (LUT). This ensures optimum storage and computational burden for the above applications. The ANN is implemented in IEEE 754 floating point with synthesis in Xilinx ISE design suite using Verilog HDL. The results are presented for a typical pressure versus saturation temperature.]]>
<![CDATA[Long Term Evolution Band Selectable Digital up Converter ]]>
<![CDATA[Gowda, Nayana]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp%p
<![CDATA[Wireless base-station Radio consists of many important blocks like Digital Front end (DFE), Digital to analog converters(DAC) , Analog to Digital converter(ADC) and many analog amplifiers to transmit and receive the required RF signals. DFE blocks helps in easy configuration of the carriers within the spectrum available. Performance of a Radio mainly depends on the better implementation of the DFE. The output of the Base band signals are fed to the DFE block which implements the required changes to the input signal and feeds the data to a higher sample rate DAC for downlink, this process of up sampling of data is done by Digital Up convertor (DUC) block which is a part of the DFE. Similarly the DFE takes processed digital converted data from the ADC and down converts the signal to the baseband sample rate for further processing. This Process of down sampling of data is done by Digital down convertor (DDC) block which also is a part of the DFE. The number of antenna ports and the number of carrier required to configure per antenna port defines the requirement of for the Number of DUC & DDC paths to be used in the DFE design. If there are 4 antenna ports and single carrier configuration per antenna port then the number of DUC block required will be 4 for this design. Hence the effective implementation of the DUC/DDC block will define the effective resource requirement for a DFE design.]]>
<![CDATA[Image processing using a reconfigurable platform: Pre-processing block hardware architecture ]]>
<![CDATA[Chiranjeevi G. N.]]>;
<![CDATA[Subhash Kulkarni]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp230-236
<![CDATA[Real time image processing is a challenging task in which fetching the sub image requires offset memory access apart from core processing needs. This paper aims at overcoming the offset needs for memory addressing in pre-processing blocks. Another feature of this present work is to appending the image data with customized algorithmic reequipments viz duplicating, zero padding. For KxK kernel size, the proposed hardware architecture can be programmed to fetch K pixels in one cycle, reducing the data access time. Results have been compared with software-based processing for KxK spatial filtering. performance indicates significant timing improvement using proposed pre-processing hardware block.]]>
<![CDATA[ACCESS - IoT enabled smart lock ]]>
<![CDATA[Harshith Gadupu]]>;
<![CDATA[Osa Mokharji]]>;
<![CDATA[Raunak Kankaria]]>;
<![CDATA[Shrey Kumar]]>;
<![CDATA[Kayalvizhi Jayavel]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp176-185
<![CDATA[ACCESS is a centrally controlled extensible security system - a system for enhancing accessibility and security methods. Security is an important matter of concern and everyone wants things easy and fast with the advancement of technology. Many IoT engineers are inclined towards home automation today. An area of recent interest is the automation of lock and key systems of homes and workplaces. This paper comprises mechanisms to view visitors of households, machinery, or any appliance that may be remotely controlled through a mobile application. Owners or supervisors can keep a watch on the guests and choose whom they want to grant entry to. This is conducted by providing the guests with temporary access permission for a validity period of the owner’s choice. They can also simultaneously monitor the activities of the guests.]]>
<![CDATA[A PSO based optimal repeater insertion technique for Carbon Nanotube interconnects ]]>
<![CDATA[P, Uma Sathyakam]]>;
<![CDATA[Raj, Shubham]]>;
<![CDATA[Mallick, Partha S.]]>
<![CDATA[ International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 10, No 3: November 2021 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
Show Abstract
|
Download Original
|
Original Source
|
Check in Google Scholar
|
DOI: 10.11591/ijres.v10.i3.pp%p
<![CDATA[Optimal repeater insertion is important in VLSI interconnects to reduce their propagation delay and power dissipation. We propose a particle swarm optimization (PSO) based optimal repeater number for different lengths of carbon nanotube (CNT) interconnects at 22nm and 14nm technology nodes. First, numerical equations for optimal repeaters are modelled. Secondly, a PSO based algorithm is developed and various input parameters are enlisted to train the PSO. Optimal number of repeaters and the propagation delay for CNT interconnects for lengths ranging from 500 to 2000µm are found out. Results are compared for both the methods and it is found that they are within 2% deviation. This means that PSO is an effective method to find optimum repeaters in VLSI interconnects. Though earlier works show similar findings, we have used CNTFET based inverters as drivers of CNT interconnects for the first time. Also, for two values of repeater size, i.e., h = 50 and 75, we have carried out the analysis.]]>
